Non-volatile floating gate Metal Oxide Semiconductor ("MOS") memories are well known in the industry. In such devices, the conductive state of the transistor memory cell is determined by the voltage of the associated floating gate. Typically, a negatively charged floating gate represents a binary one state while an uncharged floating gate represents a binary zero state.
More particularly, a conventional Electrically Erasable Programmable Read Only Memory ("EEPROM") utilizes a floating (unconnected) conductive gate, in a field effect transistor structure, positioned over but insulated from a channel region in a semiconductor substrate, between source and drain regions. A control gate is then provided over the floating gate, but also insulated therefrom. The threshold voltage (V.sub.T) characteristic of the transistor is controlled by the amount of charge retained on the floating gate. That is, the minimum amount of voltage (i.e., threshold) that must be applied to the control gate before the transistor is turned "on" to permit conduction between its source and drain regions is controlled by the level of charge on the floating gate. A transistor is conventionally programmed to one of two states by directly accelerating electrons from the substrate channel region, through a thin gate dielectric and onto the floating gate.
The memory cell transistor's state is read by placing an operating voltage across its source and drain and on its control gate, and then detecting the level of current flowing between the source and drain as to whether the device is programmed to be "on" or "off" at the control gate voltage selected. A specific, single cell in a two dimensional array of EEPROM cells is addressed for reading by application of a source-drain voltage to the source and drain lines in a column containing the cell being addressed, and application of a control gate voltage to the control gates in a row containing the cell being addressed.
Conventionally, to write data into a memory cell, the cell must be first erased and then written. Each of these operations takes approximately ten milliseconds, and each requires, for example, a 20 V supply of voltage. Decoder circuits are used to sustain the needed high voltages at the appropriate cells. These high voltage circuits generally do not scale down in size with the decreasing line widths now attainable with ever improving lithographic techniques. (By comparison, to read a device typically requires three to five volts applied and read cycle times are on the order of hundreds of nanoseconds.) The present invention is directed toward reducing the conventionally required time and voltage for writing to an EEPROM memory cell.